James Platt

I am an Electronics Engineer at The University of Manchester and was the Electronics Lead for their Formula Student team, Manchester Stinger Motorsports, for the 25-26 Season.

My interests sit at the intersection of embedded systems, hardware design, low-level software (primarily C/C++), and more recently, FPGA development in VHDL and SystemVerilog.

Since school, I've built several things; from CAN nodes to mesh radio networks. I use this website to document a collection of both completed and ongoing projects, in a slightly less formal style than I've used before.

You can find more through my posts, or find me on GitHub, and LinkedIn.